MTIA 300: Meta’s First Training Chip with Built-in NICs and Communication-Offloading Engines

Meta Engineering reports that the MTIA 300 is the company's first in‑house accelerator with networking built directly into the silicon, using two chiplets that together host twelve custom eight hundred gigabit per second NICs and deliver about one point two terabytes per second of I/O bandwidth. By pairing this hardware with a co‑designed communication library called HCCL, the chip can offload collective operations to dedicated message engines, keeping compute throughput virtually unchanged – less than half a percent slowdown when training large models alongside communication, compared with the twenty percent or more penalty seen on conventional GPUs. In a production test on a 150‑billion‑parameter recommendation model spread across forty accelerators, the MTIA 300 achieved communication speeds roughly three point nine times faster than an equivalent GPU cluster. The company says the same architecture will also support future inference workloads that demand low‑latency, high‑rate messaging as AI systems become more reasoning‑focused.

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